Project Overview
For this project, I created a circuit on MultiSim to simulate a Deli Counter display that would be used to count customers from 00 to 80 and then reset at 00. The counter automatically pauses when it reaches 80 and can be manually reset at any time with a switch.
Design mode on MultiSim is a virtual circuit builder that allows you to build and test circuits before implementing them in real life. PLD mode contains many of the same functions, but in PLD mode, you're able to build something that can then be uploaded to a Cmod 6 chip and connected with wires on a breadboard to perform these functions in real life. In PLD mode, pins of the Cmod chip are assigned to different inputs and outputs of the circuit. Pins that are assigned to inputs will generally be connected with wires to things such as switches, buttons, or clocks. Pins that are assigned to outputs will be connected to things that can be seen or heard, such as LEDs or buzzers. The circuit that is created with pins assigned is then uploaded from the computer to the chip, which is placed on a breadboard. Wires connect the pins of the chip to different inputs and outputs that are activated or displayed.
Final Project Conclusions
SSI stands for small scale integration and MSI stands for medium scale integration. Small scale integration refers to the type of chips that we use in class when we do hands on projects. These chips contain a small amount of gates; no more than 10. We use MSI circuits on MultiSim, after we've learned what goes inside of them, to perform functions that require more than 10 but less than 100 logic gates. The MSI that was used in the Deli Counter display, the 74LS93, is limited in that it can only count up, it must reset at zero, and it only can have as many as 4 bits. The "ripple effect" is when another number (or a few other numbers) is shown on the display for a very brief second before the display portrays the next correct number. This happens because the previous number is not completely reset before the display moves on to the next, so it sort of lags. I used the 74LS93 to resemble the "ones place," so this counter goes from 0-9 and then resets back at 0 and repeats. When a 10 is detected, the 4 input NAND gate puts out a 0, which gets inverted again into a 1, connecting back to the 93 chip, which resets the display to 0 and starts over again. The 74LS93 mimics an up counter using flip flops, it's just easier to build and trace this way. The "tens place" is resembled by the four D flip flops at the bottom, which count from 0-8. The D flip flop works in the same way; when a 9 is detected (this is if they are working independently from each other, before the pause is added), then the 4 input NAND gate outputs a 0, which goes to the CLEARs of all of the 4 flip flops, displaying a 0 because when CLEAR is connected to ground it is activated. The counter pauses at 80 because a wire is connected to the positive output of the MSB of the "tens place" counter, which will only be a one for one circumstance (when the count hits 80), and that wire goes through an inverter gate, which means that it will now be outputing a 1 for all of the counts below 80. After the inverter gate, it goes through an AND gate with the clock voltage. This means that the display will continue to count up from 0, as the AND gate is receiving a 1 from the inverter as well as the clock, so the count progresses, until an 8 is detected in the "tens place," making the output of the inverter a 0, which multiplied by 1 (coming from the clock), is always 0. The count resets at 00 when the switch is grounded because an input of 0 goes into the AND gate below the "tens place" circuit, outputting a 0 that goes to each CLEAR for the D flip flops, overriding anything else, and displaying a 0. For the "ones place," the NAND gate will always be outputting a 1 (because of the truth table for NAND) because the switch is grounded, meaning one of the inputs going into the NAND gate will be 0. With this output of 1 connected to "R02" of the 74LS93, the counter is always displaying a 0, as this is how it would reset at 0 on normal occasions. Some people had different designs, but they all worked. Some people used inverter gates after an AND gate, for example, rather than just using a NAND gate.